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Dr. Pabudi T Abeyrathne

Lecturer Probationary

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Profile

Dr. Pabudi T Abeyrathne serves as a Lecturer (Probationary) at the Faculty of Computing, NSBM Green University Town. She earned her Ph.D. in Computer Engineering from the Department of Computer Engineering, Faculty of Engineering, University of Peradeniya, Sri Lanka. Her doctoral research, titled “Formally Verified Hardware Accelerated Implementation of TCP Protocol,” was a collaborative effort originating from Millennium IT, Sri Lanka. Dr. Abeyrathne specializes in Embedded Systems, Operating Systems, High-Performance Computing, and Formal Verification.

Her academic journey commenced with a Bachelor of Science Special Degree in Computer Science from the Department of Statistics and Computer Science, Faculty of Science, University of Peradeniya, Sri Lanka, where she graduated with Upper Division Second Class Honors.

She served as an Academic Demonstrator at the Department of Statistics and Computer Science, University of Peradeniya, for over a year, and subsequently as an Academic Instructor at the Department of Computer Engineering for more than six years.

 

Research Interest

  • Embedded Systems
  • Accelerated and High-Performance Computing
  • Formal Verification
  • Semantic Analysis
  • HDL
  • Data Flow Analysis
  • FPGA Designs
  • Linux Kernel
  • Operating Systems

Conference Publications

  1. Abeyrathne, P.T., Dewasurendra, S.D., & Elkaduwe, D. (2015). Strategy to Design Formally Verified hardware/software implementation of Network Protocols on Reconfigurable Hardware. In Proceedings of the 10th IEEE International Conference on Industrial and Information Systems 2015 (ICIIS’2015), Peradeniya, Sri Lanka, Dec 2015.
  2. Abeyrathne, P.T., Dewasurendra, S.D., & Elkaduwe, D. (2021). Offloading specific performance-related kernel functions into an FPGA. In 2021 IEEE 30th International Symposium on Industrial Electronics (ISIE), MiyakoMesse, Kyoto, Japan, June 2021

Journal Publications

  1. Abeyrathne, P.T., Dewasurendra, S.D., & Elkaduwe, D. (2023, submitted). Co-Flow Graph (Co-FG): Control Flow based modeling tool for HW/SW Co-Designed Systems. Journal of Electrical and Computer Engineering.